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VTS
2008
IEEE
136views Hardware» more  VTS 2008»
14 years 1 months ago
Test-Pattern Grading and Pattern Selection for Small-Delay Defects
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Te...
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
13 years 11 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham
IPPS
2010
IEEE
13 years 5 months ago
Optimizing RAID for long term data archives
We present new methods to extend data reliability of disks in RAID systems for applications like long term data archival. The proposed solutions extend existing algorithms to detec...
Henning Klein, Jörg Keller
ITC
1997
IEEE
107views Hardware» more  ITC 1997»
13 years 11 months ago
Weak Write Test Mode: An SRAM Cell Stability Design for Test Technique
The detection of cell stability and data retention faults in SRAMs has been a time consuming process. In this paper we discuss a new design for test technique called Weak Write Tes...
Anne Meixner, Jash Banik
ITC
1998
IEEE
89views Hardware» more  ITC 1998»
13 years 11 months ago
Detecting resistive shorts for CMOS domino circuits
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
Jonathan T.-Y. Chang, Edward J. McCluskey