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» Determination of the Topology of a Directed Network
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HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
BMCBI
2006
84views more  BMCBI 2006»
13 years 8 months ago
Inferring topology from clustering coefficients in protein-protein interaction networks
Background: Although protein-protein interaction networks determined with high-throughput methods are incomplete, they are commonly used to infer the topology of the complete inte...
Caroline C. Friedel, Ralf Zimmer
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 7 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
JSAC
2006
105views more  JSAC 2006»
13 years 8 months ago
Network Topology Inference Based on End-to-End Measurements
Abstract--We consider using traceroute-like end-to-end measurement to infer the underlay topology for a group of hosts. One major issue is the measurement cost. Given hosts in an a...
Xing Jin, Wai-Pun Ken Yiu, S.-H. Gary Chan, Yajun ...
INFOCOM
2009
IEEE
14 years 3 months ago
Scheduling in Mobile Ad Hoc Networks with Topology and Channel-State Uncertainty
—We study throughput-optimal scheduling/routing over mobile ad-hoc networks with time-varying (fading) channels. Traditional back-pressure algorithms (based on the work by Tassiu...
Lei Ying, Sanjay Shakkottai