73 search results - page 11 / 15 » Deterministic Logic BIST for Transition Fault Testing |
ITC
2003
IEEE
14 years 28 days ago
2003
IEEE
Energy Consumption Ratio (ECR) test, a current-based test, has shown its ability to reduce the impact of process variations and detect hard-to-detect faults. The effectiveness of ...
TCAD
2002
13 years 7 months ago
2002
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
ITC
2003
IEEE
14 years 28 days ago
2003
IEEE
Diagnosing failing vectors in a Built-In Self Test (BIST) environment is a difficult task because of the highly compressed signature coming out of the Multiple Input Shift Regist...
ICCAD
2000
IEEE
14 years 2 days ago
2000
IEEE
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
DFT
2002
IEEE
14 years 18 days ago
2002
IEEE
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...