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ICCAD
2000
IEEE

Deterministic Test Pattern Generation Techniques for Sequential Circuits

14 years 3 months ago
Deterministic Test Pattern Generation Techniques for Sequential Circuits
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation algorithms. To be able to assess the effectiveness of the proposed techniques, we have developed a new ATPG system for sequential circuits, called ATOMS, and we have incorporated these techniques into the test generator. ATOMS achieved very high fault coverages in a short amount of time for the ISCAS89 sequential benchmark circuits, demonstrating the effectiveness of these techniques on the test generation performance.
Ilker Hamzaoglu, Janak H. Patel
Added 31 Jul 2010
Updated 31 Jul 2010
Type Conference
Year 2000
Where ICCAD
Authors Ilker Hamzaoglu, Janak H. Patel
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