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» Diagonal routing in high performance microprocessor design
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ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
14 years 2 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
NOCS
2010
IEEE
13 years 6 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
SIGCOMM
2010
ACM
13 years 8 months ago
Symbiotic routing in future data centers
Building distributed applications for data centers is hard. CamCube explores whether replacing the traditional switchbased network with a directly connected topology makes it easi...
Hussam Abu-Libdeh, Paolo Costa, Antony I. T. Rowst...
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
14 years 1 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
SIMUTOOLS
2008
13 years 10 months ago
An OMNeT++ model for the evaluation of OBS routing strategies
Optical Burst Switching (OBS) has been proposed as a costeffective paradigm for supporting, with adequate flexibility, the increasingly high transmission capacity required by the ...
A. L. Barradas, M. C. R. Medeiros