Sciweavers

410 search results - page 58 / 82
» Diagonal routing in high performance microprocessor design
Sort
View
EWSN
2009
Springer
14 years 8 months ago
A Better Choice for Sensor Sleeping
Sensor sleeping is a widely-used and cost-effective technique to save energy in wireless sensor networks. Protocols at different stack levels can, either individually or simultaneo...
Ou Yang, Wendi Rabiner Heinzelman
ICCAD
2000
IEEE
102views Hardware» more  ICCAD 2000»
13 years 11 months ago
Provably Good Global Buffering Using an Available Buffer Block Plan
To implement high-performance global interconnect without impacting the performance of existing blocks, the use of buffer blocks is increasingly popular in structured-custom and b...
Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu,...
IEEEPACT
2008
IEEE
14 years 1 months ago
Skewed redundancy
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
Gordon B. Bell, Mikko H. Lipasti
CF
2006
ACM
13 years 11 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...
DSD
2007
IEEE
160views Hardware» more  DSD 2007»
14 years 1 months ago
Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire