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EDCC
2005
Springer
14 years 1 months ago
Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs
Abstract. Current paper proposes an efficient alternative for traditional gatelevel fault simulation. The authors explain how Structurally Synthesized Binary Decision Diagrams (SSB...
Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jut...
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Interconnect capacitance estimation for FPGAs
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Jason Helge Anderson, Farid N. Najm
FPL
2004
Springer
113views Hardware» more  FPL 2004»
14 years 1 months ago
An Evolvable Hardware Tutorial
Abstract. Evolvable Hardware (EHW) is a scheme - inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find so...
Jim Torresen
FDL
2003
IEEE
14 years 28 days ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
IPPS
2003
IEEE
14 years 28 days ago
Task Graph Scheduling Using Timed Automata
In this paper we develop a methodology for treating the problem of scheduling partially-ordered tasks on parallel machines. Our framework is based on the timed automaton model, or...
Yasmina Abdeddaïm, Abdelkarim Kerbaa, Oded Ma...