Abstract. Current paper proposes an efficient alternative for traditional gatelevel fault simulation. The authors explain how Structurally Synthesized Binary Decision Diagrams (SSB...
Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jut...
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Abstract. Evolvable Hardware (EHW) is a scheme - inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find so...
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
In this paper we develop a methodology for treating the problem of scheduling partially-ordered tasks on parallel machines. Our framework is based on the timed automaton model, or...