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CP
1998
Springer
14 years 1 months ago
Generation of Test Patterns for Differential Diagnosis of Digital Circuits
In a faulty digital circuit, many (single) faulty gates may explain the observed findings. In this paper we are mostly concerned, not in obtaining alternative diagnoses, but rathe...
Francisco Azevedo, Pedro Barahona
TVLSI
2008
116views more  TVLSI 2008»
13 years 8 months ago
Adaptive Cooling of Integrated Circuits Using Digital Microfluidics
Thermal management is critical for integrated circuit (IC) design. With each new IC technology generation, feature sizes decrease, while operating speeds and package densities incr...
Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakr...
ASPDAC
2006
ACM
129views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA)
With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged...
Vineet Agarwal, Janet Meiling Wang
ICCD
2000
IEEE
123views Hardware» more  ICCD 2000»
14 years 5 months ago
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
Payam Heydari, Massoud Pedram
ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
14 years 3 months ago
Adaptive techniques for overcoming performance degradation due to aging in digital circuits
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a major reliability concern in present-day digital circuit design. Further, with the recent usage of...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...