787 search results - page 74 / 158 » Digital Algebra and Circuits |
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
ISQED
2011
IEEE
12 years 12 months ago
2011
IEEE
—Design optimization methodologies for AMS-SoCs with analog, digital, and mixed-signal portions have not received significant attention, due to their high complexity. In mixed-s...
ATVA
2007
Springer
14 years 3 months ago
2007
Springer
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
GLVLSI
2006
IEEE
14 years 3 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...