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FMSD
2010
123views more  FMSD 2010»
13 years 7 months ago
Analog property checkers: a DDR2 case study
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
Kevin D. Jones, Victor Konrad, Dejan Nickovic
IPPS
2010
IEEE
13 years 6 months ago
Prototype for a large-scale static timing analyzer running on an IBM Blue Gene
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...
CORR
2010
Springer
158views Education» more  CORR 2010»
13 years 4 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
ISQED
2006
IEEE
136views Hardware» more  ISQED 2006»
14 years 3 months ago
An Improved AMG-based Method for Fast Power Grid Analysis
The continuing VLSI technology scaling leads to increasingly significant power supply fluctuations, which need to be modeled accurately in circuit design and verification. Meanwhi...
Cheng Zhuo, Jiang Hu, Kangsheng Chen
DAC
2007
ACM
14 years 10 months ago
Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...
Kunhyuk Kang, Kee-Jong Kim, Ahmad E. Islam, Muhamm...