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DATE
2007
IEEE
138views Hardware» more  DATE 2007»
14 years 2 months ago
An ADC-BiST scheme using sequential code analysis
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...
Erdem Serkan Erdogan, Sule Ozev
IPSN
2010
Springer
13 years 9 months ago
Hibernets: energy-efficient sensor networks using analog signal processing
In-network processing is recommended for many sensor network applications to reduce communication and improve energy efficiency. However, constraints on memory, speed, and energy ...
Brandon Rumberg, David W. Graham, Vinod Kulathuman...
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
14 years 2 months ago
Low-power IC design for a wireless BCI system
—Integrated circuit (IC) design for a wireless BCI system is put forward in this paper. The system is composed of an electrode, a stimulator, antennas, and an integrated circuit ...
Ming Liu, Hong Chen, Run Chen, Zhihua Wang
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
14 years 4 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
DAC
2005
ACM
14 years 8 months ago
Automated nonlinear Macromodelling of output buffers for high-speed digital applications
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
Ning Dong, Jaijeet S. Roychowdhury