1236 search results - page 220 / 248 » Digital Library |
ISPD
1999
ACM
14 years 2 months ago
1999
ACM
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
DAC
2010
ACM
14 years 1 months ago
2010
ACM
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
ASAP
2004
IEEE
14 years 1 months ago
2004
IEEE
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
CVPR
2008
IEEE
13 years 11 months ago
2008
IEEE
We present a new approach for building reconstruction from a single Digital Elevation Model (DEM). It treats buildings as an assemblage of simple urban structures extracted from a...
CSREASAM
2008
13 years 11 months ago
2008
Abstract--Packet Level Authentication (PLA) is a novel countermeasure against distributed denial-of-service attacks. Each packet sent across a network has a digital signature and p...