Sciweavers

3006 search results - page 168 / 602
» Dimensionality reduction and generalization
Sort
View
DAC
2002
ACM
16 years 4 months ago
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, S...
126
Voted
DAC
2003
ACM
16 years 4 months ago
Power grid reduction based on algebraic multigrid principles
With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
Haihua Su, Emrah Acar, Sani R. Nassif
149
Voted
DAC
2004
ACM
16 years 4 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
DAC
2005
ACM
16 years 4 months ago
Segregation by primary phase factors: a full-wave algorithm for model order reduction
Existing Full-wave Model Order Reduction (FMOR) approaches are based on Expanded Taylor Series Approximations (ETAS) of the oscillatory full-wave system matrix. The accuracy of su...
Thomas J. Klemas, Luca Daniel, Jacob K. White
128
Voted
DAC
2005
ACM
16 years 4 months ago
Enhanced leakage reduction Technique by gate replacement
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
Lin Yuan, Gang Qu