3006 search results - page 169 / 602 » Dimensionality reduction and generalization |
120
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GLVLSI
2009
IEEE
15 years 10 months ago
2009
IEEE
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
112
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ICC
2007
IEEE
15 years 10 months ago
2007
IEEE
—Peak-to-average power ratio (PAR) reduction in OFDM using antenna arrays (MIMO OFDM) is considered. In particular, generalizations of selected mapping (SLM) recently proposed in...
125
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KBSE
2007
IEEE
15 years 10 months ago
2007
IEEE
This paper presents a tool that (i) constructs tree-based models of a program’s behavior during testing and (ii) employs these trees while reordering and reducing a test suite. ...
116
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GLVLSI
2005
IEEE
15 years 9 months ago
2005
IEEE
3D packaging via System-On-Package (SOP) is a viable alternative to System-On-Chip (SOC) to meet the rigorous requirements of today’s mixed signal system integration. In this wo...
126
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ISLPED
2005
ACM
15 years 9 months ago
2005
ACM
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...