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» Dimensionality reduction and generalization
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183
Voted
TKDE
2012
270views Formal Methods» more  TKDE 2012»
13 years 6 months ago
Low-Rank Kernel Matrix Factorization for Large-Scale Evolutionary Clustering
—Traditional clustering techniques are inapplicable to problems where the relationships between data points evolve over time. Not only is it important for the clustering algorith...
Lijun Wang, Manjeet Rege, Ming Dong, Yongsheng Din...
145
Voted
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
15 years 7 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
DAC
2005
ACM
16 years 4 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2006
ACM
16 years 4 months ago
Standard cell characterization considering lithography induced variations
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
Ke Cao, Sorin Dobre, Jiang Hu
134
Voted
DAC
2006
ACM
16 years 4 months ago
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
Hao Hua, Christopher Mineo, Kory Schoenfliess, Amb...