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» Dimensionality reduction and generalization
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SIGECOM
2003
ACM
174views ECommerce» more  SIGECOM 2003»
14 years 1 months ago
Collaboration software to reduce inventory and increase response
Some recent trends in business and manufacturing hold the promise of greater profits, yet, due to profit-robbing inventory increases, this promise has not been fully realized. [9]...
Indu Bingham, Barbara Hoefle, Kim Phan, Jim Sizemo...
SIGMETRICS
2003
ACM
119views Hardware» more  SIGMETRICS 2003»
14 years 1 months ago
Incrementally improving lookup latency in distributed hash table systems
Distributed hash table (DHT) systems are an important class of peer-to-peer routing infrastructures. They enable scalable wide-area storage and retrieval of information, and will ...
Hui Zhang 0002, Ashish Goel, Ramesh Govindan
SLIP
2003
ACM
14 years 1 months ago
Perimeter-degree: a priori metric for directly measuring and homogenizing interconnection complexity in multilevel placement
In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...
Navaratnasothie Selvakkumaran, Phiroze N. Parakh, ...
FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 1 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 1 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...