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» Disclosing the LDPC code decoder design space
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FCCM
2008
IEEE
118views VLSI» more  FCCM 2008»
14 years 1 months ago
A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture
We propose a new powerful scalable generic parallel and modular architecture well suited to LDPC code decoding. This architecture template has been instantiated in the case of the...
François Charot, Christophe Wolinski, Nicol...
ICIP
2005
IEEE
14 years 9 months ago
Two-channel predictive multiple description coding
This paper presents a multiple description (MD) video codec based on the principles side-information coding. In particular, we highlight certain key components of the codec design...
Ashish Jagmohan, Anshul Sehgal, Narendra Ahuja
ICC
2009
IEEE
146views Communications» more  ICC 2009»
13 years 5 months ago
On Construction of Moderate-Length LDPC Codes over Correlated Erasure Channels
The design of moderate-length erasure correcting low-density parity-check (LDPC) codes over correlated erasure channels is considered. Although the asymptotic LDPC code design rema...
Gianluigi Liva, Balázs Matuz, Zoltán...
DATE
2007
IEEE
93views Hardware» more  DATE 2007»
14 years 1 months ago
Minimum-energy LDPC decoder for real-time mobile application
— This paper presents a low-power real-time decoder that provides constant-time processing of each frame using dynamic voltage and frequency scaling. The design uses known capaci...
Weihuang Wang, Gwan Choi
AAECC
2006
Springer
122views Algorithms» more  AAECC 2006»
13 years 11 months ago
Low-Floor Tanner Codes Via Hamming-Node or RSCC-Node Doping
We study the design of structured Tanner codes with low error-rate floors on the AWGN channel. The design technique involves the "doping" of standard LDPC (proto-)graphs,...
Shadi Abu-Surra, Gianluigi Liva, William E. Ryan