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ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
14 years 2 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke
ISORC
2008
IEEE
14 years 2 months ago
Hardware Objects for Java
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
Martin Schoeberl, Christian Thalinger, Stephan Kor...
IROS
2007
IEEE
114views Robotics» more  IROS 2007»
14 years 2 months ago
Design and control of a second-generation hyper-redundant mechanism
— We present a refined, second-generation design, construction and integration, of a compact hyper-redundant snakelike robot, called “Woodstock.” This robot has substantial a...
H. Ben Brown, Michael Schwerin, Elie A. Shammas, H...
EMSOFT
2007
Springer
14 years 2 months ago
Slice-balancing H.264 video encoding for improved scalability of multicore decoding
With multicore architectures being introduced to the market, the research community is revisiting problems to evaluate them under the new preconditions set by those new systems. A...
Michael Roitzsch
FPL
2007
Springer
105views Hardware» more  FPL 2007»
14 years 2 months ago
Time Predictable CPU and DMA Shared Memory Access
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
Christof Pitter, Martin Schoeberl