315 search results - page 12 / 63 » Disk layout optimization for reducing energy consumption |
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
As application complexity increases, modern embedded systems have adopted heterogeneous processing elements to enhance the computing capability or to reduce the power consumption. ...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents a method to reduce energy consumption by inserting data buffers. The method determines whether power can be reduced by inserting a buffer between two component...
CF
2004
ACM
14 years 28 days ago
2004
ACM
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
: Adaptive transceivers can significantly reduce the energy consumption of a mobile, battery-powered node by capturing realtime changes in the communication channel. This paper pro...