315 search results - page 45 / 63 » Disk layout optimization for reducing energy consumption |
DATE
2002
IEEE
14 years 17 days ago
2002
IEEE
Intra-iteration data reuse occurs when multiple array references exhibit data reuse in a single loop iteration. An optimizing compiler can exploit this reuse by clustering (in the...
TCAD
2002
13 years 7 months ago
2002
The objective of this work is to create a framework for the optimization of embedded software. We present algorithms and a tool flow to reduce the computational effort of programs,...
DAC
2010
ACM
13 years 11 months ago
2010
ACM
System optimization techniques based on dynamic voltage scaling (DVS) are widely used with the aim of reducing processor energy consumption. Inter-task DVS assigns the same voltag...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...