Sciweavers

3346 search results - page 12 / 670
» Distributed Caching Platforms
Sort
View
SPAA
2004
ACM
14 years 1 months ago
Effectively sharing a cache among threads
We compare the number of cache misses M1 for running a computation on a single processor with cache size C1 to the total number of misses Mp for the same computation when using p ...
Guy E. Blelloch, Phillip B. Gibbons
CF
2004
ACM
13 years 11 months ago
Reducing traffic generated by conflict misses in caches
Off-chip memory accesses are a major source of power consumption in embedded processors. In order to reduce the amount of traffic between the processor and the off-chip memory as ...
Pepijn J. de Langen, Ben H. H. Juurlink
ARC
2006
Springer
124views Hardware» more  ARC 2006»
13 years 11 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
DATE
2004
IEEE
159views Hardware» more  DATE 2004»
13 years 11 months ago
Compositional Memory Systems for Data Intensive Applications
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set ba...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
NAS
2007
IEEE
14 years 2 months ago
An Efficient SAN-Level Caching Method Based on Chunk-Aging
: SAN-level caching can manage caching within a global view so that global hot data can be identified and cached. However, two problems may be encountered in the existing SAN-level...
Jiwu Shu, Yang Wang 0009, Wei Xue, Yifeng Luo