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MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
14 years 2 months ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002
CORR
2010
Springer
186views Education» more  CORR 2010»
13 years 8 months ago
Capacitated Caching Games
Capacitated Caching (CC) Games are motivated by P2P and web caching applications, and involve nodes on a network making strategic choices regarding the content to replicate in the...
Ragavendran Gopalakrishnan, Dimitrios Kanoulas, Na...
JSS
2008
91views more  JSS 2008»
13 years 8 months ago
A parametrized algorithm that implements sequential, causal, and cache memory consistencies
In this paper, we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it inclu...
Ernesto Jiménez, Antonio Fernández, ...
SIAMCOMP
2012
11 years 10 months ago
Randomized Competitive Algorithms for Generalized Caching
We consider online algorithms for the generalized caching problem. Here we are given a cache of size k and pages with arbitrary sizes and fetching costs. Given a request sequence ...
Nikhil Bansal, Niv Buchbinder, Joseph Naor
HPCA
2009
IEEE
14 years 8 months ago
iCFP: Tolerating all-level cache misses in in-order processors
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
Andrew D. Hilton, Santosh Nagarakatte, Amir Roth