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» Distributed Synthesis for Alternating-Time Logics
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ACSD
2010
IEEE
239views Hardware» more  ACSD 2010»
13 years 9 months ago
A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...
W. B. Toms, David A. Edwards
ICCAD
2003
IEEE
117views Hardware» more  ICCAD 2003»
14 years 7 months ago
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible...
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
ISORC
2009
IEEE
14 years 5 months ago
Component Based Middleware-Synthesis for AUTOSAR Basic Software
Distributed real-time automotive embedded systems have to be highly dependable as well as cost-efficient due to the large number of manufactured units. To close the gap between r...
Dietmar Schreiner, Markus Schordan, Karl M. Gö...
FMSD
2006
140views more  FMSD 2006»
13 years 11 months ago
Dealing with practical limitations of distributed timed model checking for timed automata
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
Víctor A. Braberman, Alfredo Olivero, Ferna...
DATE
2010
IEEE
130views Hardware» more  DATE 2010»
14 years 2 months ago
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming C...