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HPCA
2008
IEEE
14 years 10 months ago
Cluster-level feedback power control for performance optimization
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
Xiaorui Wang, Ming Chen
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
14 years 5 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...
ATS
2001
IEEE
126views Hardware» more  ATS 2001»
14 years 2 months ago
Design of an Optimal Test Access Architecture Using a Genetic Algorithm
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
Zahra Sadat Ebadi, André Ivanov
ICDT
1995
ACM
79views Database» more  ICDT 1995»
14 years 1 months ago
Optimization Using Tuple Subsumption
A tuple t1 of relation R subsumes tuple t2 of R, with respect to a query Q if for every database, tuple t1 derives all, and possibly more, answers to query Q than derived by tuple ...
Venky Harinarayan, Ashish Gupta
IPPS
1998
IEEE
14 years 2 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man