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» Distributed sleep transistor network for power reduction
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DAC
2002
ACM
14 years 8 months ago
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, S...
ASPLOS
2012
ACM
12 years 2 months ago
DreamWeaver: architectural support for deep sleep
Numerous data center services exhibit low average utilization leading to poor energy efficiency. Although CPU voltage and frequency scaling historically has been an effective mea...
David Meisner, Thomas F. Wenisch
ISPD
2007
ACM
124views Hardware» more  ISPD 2007»
13 years 8 months ago
Accurate power grid analysis with behavioral transistor network modeling
In this paper, we propose fast and efficient techniques to analyze the power grid with accurate modeling of the transistor network. The solution techniques currently available for...
Anand Ramalingam, Giri Devarayanadurg, David Z. Pa...
ICDCSW
2003
IEEE
14 years 11 days ago
Adaptive Power Control and Selective Radio Activation for Low-Power Infrastructure-Mode 802.11 LANs
We present an integrated dual approach to reduce power consumption in infrastructure-mode 802.11 wireless LANs. A novel distributed power control algorithm adaptively adjusts the ...
Anmol Sheth, Richard Han
DAC
2005
ACM
14 years 8 months ago
An effective power mode transition technique in MTCMOS circuits
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
Afshin Abdollahi, Farzan Fallah, Massoud Pedram