7379 search results - page 1223 / 1476 » Distributed vector architectures |
109
Voted
HPCA
2002
IEEE
16 years 3 months ago
2002
IEEE
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...
108
Voted
HPCA
2002
IEEE
16 years 3 months ago
2002
IEEE
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
128
Voted
HPCA
2001
IEEE
16 years 3 months ago
2001
IEEE
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
HPCA
2001
IEEE
16 years 3 months ago
2001
IEEE
Value prediction is a relatively new technique to increase the Instruction Level Parallelism (ILP) in future microprocessors. An important problem when designing a value predictor...
127
Voted
HPCA
2001
IEEE
16 years 3 months ago
2001
IEEE
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...