Many recent techniques for timing analysis under variability, in which delay is an explicit function of underlying parameters, may be described as parameterized timing analysis. T...
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton,...
We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng...