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108
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ISCA
2008
IEEE
15 years 8 months ago
2008
IEEE
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
107
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MICRO
2008
IEEE
15 years 8 months ago
2008
IEEE
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
113
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MICRO
2008
IEEE
15 years 8 months ago
2008
IEEE
Existing DRAM controllers employ rigid, non-adaptive scheduling and buffer management policies when servicing prefetch requests. Some controllers treat prefetch requests the same ...
115
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MICRO
2008
IEEE
15 years 8 months ago
2008
IEEE
Traditional coherence protocols present a set of difficult tradeoffs: the reliance of snoopy protocols on broadcast and ordered interconnects limits their scalability, while dire...
147
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RTSS
2007
IEEE
15 years 8 months ago
2007
IEEE
It is challenging to process transactions in a timely fashion using fresh data, e.g., current stock prices, since database workloads may considerably vary due to dynamic data/reso...