473 search results - page 23 / 95 » Dynamic Memory Design for Low Data-Retention Power |
130
Voted
MICRO
2003
IEEE
15 years 8 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
126
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GLOBECOM
2007
IEEE
15 years 4 months ago
2007
IEEE
: The improvement of spectral efficiency comes at the cost of exponential increment of signal processing complexity [1]. Hence, the energy-efficiency of baseband has recently turne...
130
Voted
ANCS
2005
ACM
15 years 8 months ago
2005
ACM
New network applications like intrusion detection systems and packet-level accounting require multi-match packet classification, where all matching filters need to be reported. Te...
234
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ISCA
2012
IEEE
13 years 5 months ago
2012
IEEE
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
127
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ICCAD
2001
IEEE
15 years 11 months ago
2001
IEEE
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...