473 search results - page 36 / 95 » Dynamic Memory Design for Low Data-Retention Power |
174
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CODES
2004
IEEE
15 years 6 months ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
115
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ISCAS
2005
IEEE
15 years 8 months ago
2005
IEEE
Due to the powerful error correcting performance, turbo codes have been adopted in many wireless communication standards. Although several low-power techniques have been proposed,...
112
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ICCAD
2007
IEEE
15 years 12 months ago
2007
IEEE
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
127
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CODES
2001
IEEE
15 years 6 months ago
2001
IEEE
Power consumption is an important design parameter for embedded and portable systems. Software-controlled (or dynamic) power management (DPM) has recently emerged as an attractive...
142
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CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...