473 search results - page 36 / 95 » Dynamic Memory Design for Low Data-Retention Power |
CODES
2004
IEEE
14 years 13 days ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
ISCAS
2005
IEEE
14 years 2 months ago
2005
IEEE
Due to the powerful error correcting performance, turbo codes have been adopted in many wireless communication standards. Although several low-power techniques have been proposed,...
ICCAD
2007
IEEE
14 years 5 months ago
2007
IEEE
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
CODES
2001
IEEE
14 years 10 days ago
2001
IEEE
Power consumption is an important design parameter for embedded and portable systems. Software-controlled (or dynamic) power management (DPM) has recently emerged as an attractive...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...