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» Dynamic Memory Design for Low Data-Retention Power
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CASES
2007
ACM
14 years 23 days ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
OSDI
2000
ACM
13 years 10 months ago
Policies for Dynamic Clock Scheduling
Pocket computers are beginning to emerge that provide sufficient processing capability and memory capacity to run traditional desktop applications and operating systems on them. T...
Dirk Grunwald, Philip Levis, Keith I. Farkas, Char...
MICRO
2002
IEEE
128views Hardware» more  MICRO 2002»
14 years 1 months ago
Compiler-directed instruction cache leakage optimization
Excessive power consumption is widely considered as a major impediment to designing future microprocessors. With the continued scaling down of threshold voltages, the power consum...
Wei Zhang 0002, Jie S. Hu, Vijay Degalahal, Mahmut...
SIGCOMM
2010
ACM
13 years 9 months ago
NapSAC: design and implementation of a power-proportional web cluster
Energy consumption is a major and costly problem in data centers. A large fraction of this energy goes to powering idle machines that are not doing any useful work. We identify tw...
Andrew Krioukov, Prashanth Mohan, Sara Alspaugh, L...
ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
14 years 2 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun