473 search results - page 62 / 95 » Dynamic Memory Design for Low Data-Retention Power |
ISCA
2011
IEEE
13 years 13 days ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
SENSYS
2006
ACM
14 years 2 months ago
2006
ACM
Extensive empirical studies presented in this paper confirm that the quality of radio communication between low power sensor devices varies significantly with time and environme...
IEEEPACT
2000
IEEE
14 years 1 months ago
2000
IEEE
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
CASES
2004
ACM
14 years 2 months ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...