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    » Dynamic Memory Design for Low Data-Retention Power
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    LCTRTS
    2007
    Springer
    142views System Software» more  LCTRTS 2007»
    Compiler-managed partitioned data caches for low power
    14 years 1 months ago
    Compiler-managed partitioned data caches for low power
    Download  cccp.eecs.umich.edu
    Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
    Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
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    PODC
    2011
    ACM
    217views Distributed and Parallel Com...» more  PODC 2011»
    On the power of hardware transactional memory to simplify memory management
    12 years 10 months ago
    On the power of hardware transactional memory to simplify memory management
    Download  www.cs.brown.edu
    Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memo...
    Aleksandar Dragojevic, Maurice Herlihy, Yossi Lev,...
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    ASPDAC
    2008
    ACM
    173views Hardware» more  ASPDAC 2008»
    Experiences of low power design implementation and verification
    13 years 9 months ago
    Experiences of low power design implementation and verification
    Download  www.cecs.uci.edu
    Shi-Hao Chen, Jiing-Yuan Lin
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    DAC
    1999
    ACM
    168views Computer Architecture» more  DAC 1999»
    Memory Exploration for Low Power, Embedded Systems
    14 years 8 months ago
    Memory Exploration for Low Power, Embedded Systems
    Download  www.cs.ucr.edu
    In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
    Wen-Tsong Shiue, Chaitali Chakrabarti
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    TVLSI
    2010
    200views Artificial Intelligence» more  TVLSI 2010»
    A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
    13 years 2 months ago
    A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
    Download  www.ece.ucsb.edu
    Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
    Hamed F. Dadgour, Kaustav Banerjee
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