41 search results - page 5 / 9 » Dynamic Partial Reconfigurable FIR Filter Design |
125
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IJES
2006
15 years 2 months ago
2006
This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
82
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ICASSP
2011
IEEE
14 years 6 months ago
2011
IEEE
Digital filters with adjustable bandwidth(s) are generally desirable in many applications like audio processing and telecommunication. This paper proposes a generalized Farrow st...
112
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DAC
2002
ACM
16 years 3 months ago
2002
ACM
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
137
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ICCD
2006
IEEE
15 years 11 months ago
2006
IEEE
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
112
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ERSA
2004
15 years 4 months ago
2004
- We have previously argued the benefits of embedded Linux as an operating system platform for reconfigurable system-on-chip design. In this paper we describe our approach building...