In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Metacomputing frameworks have received renewed attention of late, fueled both by advances in hardware and networking, and by novel concepts such as computational grids. However the...
Mauro Migliardi, Jack Dongarra, Al Geist, Vaidy S....
Next generation embedded systems place new demands on an efficient methodology for their design and verification. These systems have to support interaction over a network, multipl...
Josef Fleischmann, Klaus Buchenrieder, Rainer Kres...
Web services (WS) received significant attention recently because services can be searched, bound, and executed at runtime over the Internet. This paper proposes a dynamic reconfi...
Wei-Tek Tsai, Weiwei Song, Raymond A. Paul, Zhibin...