989 search results - page 45 / 198 » Dynamic Symmetry Reduction |
116
Voted
ICCV
2007
IEEE
16 years 4 months ago
2007
IEEE
A general methodology for noise reduction and contrast enhancement in very noisy image data with low dynamic range is presented. Video footage recorded in very dim light is especi...
140
Voted
DAC
2003
ACM
16 years 3 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
140
Voted
VLSID
2003
IEEE
16 years 3 months ago
2003
IEEE
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
119
Voted
FPGA
2009
ACM
15 years 9 months ago
2009
ACM
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
115
Voted
DAC
2005
ACM
15 years 4 months ago
2005
ACM
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...