989 search results - page 62 / 198 » Dynamic Symmetry Reduction |
DSD
2009
IEEE
14 years 1 months ago
2009
IEEE
Voltage-frequency scaling (VFS) trades a linear processor slowdown for a potentially quadratic reduction in energy consumption. Complex dependencies may exist between different tas...
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Fine-grained dynamic voltage/frequency scaling (DVFS) is an important tool in managing the balance between power and performance in chip-multiprocessors. Although manufacturing pr...
ICCD
2004
IEEE
14 years 6 months ago
2004
IEEE
Dynamic address compression schemes that exploit address locality can help reduce both address bus energy and cost simultaneously with only a small performance penalty. In this wo...
ISLPED
2003
ACM
14 years 3 months ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
DDECS
2006
IEEE
14 years 4 months ago
2006
IEEE
- This paper presents a carry lookahead (CLA) circuitry design based on dynamic circuit aiming at delay reduction in addition of BCD coded decimal numbers. The performance of the p...