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ESTIMEDIA
2009
Springer
14 years 4 months ago
System-level MP-SoC design space exploration using tree visualization
— The complexity of today’s embedded systems forces designers to model and simulate systems and their components to explore the wide range of design choices. Such design space ...
Toktam Taghavi, Andy D. Pimentel, Mark Thompson
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
14 years 3 months ago
Thermal resilient bounded-skew clock tree optimization methodology
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
Ashutosh Chakraborty, Prassanna Sithambaram, Karth...
SRDS
2006
IEEE
14 years 3 months ago
Cryptree: A Folder Tree Structure for Cryptographic File Systems
We present Cryptree, a cryptographic tree structure which facilitates access control in file systems operating on untrusted storage. Cryptree leverages the file system’s folde...
Dominik Grolimund, Luzius Meisser, Stefan Schmid, ...
ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
14 years 3 months ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
ATVA
2008
Springer
131views Hardware» more  ATVA 2008»
13 years 11 months ago
Computation Tree Regular Logic for Genetic Regulatory Networks
Model checking has proven to be a useful analysis technique not only for concurrent systems, but also for the genetic regulatory networks (Grns) that govern the functioning of livi...
Radu Mateescu, Pedro T. Monteiro, Estelle Dumas, H...