157 search results - page 16 / 32 » Dynamic Voltage and Cache Reconfiguration for Low Power |
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
SOCC
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
ASPDAC
2005
ACM
14 years 2 months ago
2005
ACM
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
ISLPED
2010
ACM
13 years 8 months ago
2010
ACM
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
ISLPED
2009
ACM
14 years 2 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...