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» Dynamic power gating with quality guarantees
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ISLPED
2009
ACM
116views Hardware» more  ISLPED 2009»
14 years 5 months ago
Dynamic power gating with quality guarantees
Power gating is usually driven by a predictive control, and frequent mispredictions can counter-productively lead to a large increase in energy consumption. This energy vulnerabil...
Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, Da...
VLSID
2004
IEEE
146views VLSI» more  VLSID 2004»
14 years 11 months ago
CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
DAC
2010
ACM
14 years 2 months ago
Eyecharts: constructive benchmarking of gate sizing heuristics
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...
ISPDC
2003
IEEE
14 years 4 months ago
Hardware-based Power Management for Real-Time Applications
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...
Sascha Uhrig, Theo Ungerer
GLOBECOM
2007
IEEE
14 years 20 days ago
The Quality-Energy Scalable OFDMA Modulation for Low Power Transmitter and VLIW Processor Based Implementation
: The improvement of spectral efficiency comes at the cost of exponential increment of signal processing complexity [1]. Hence, the energy-efficiency of baseband has recently turne...
Min Li, Bruno Bougard, Eduardo Lopez-Estraviz, And...