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ISSS
1998
IEEE
87views Hardware» more  ISSS 1998»
13 years 12 months ago
Instruction Encoding Techniques for Area Minimization of Instruction ROM
In this paper, we propose instruction encoding techniques for embedded system design, which encode immediate fields of instructions to reduce the size of an instruction memory. Al...
Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, ...
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
14 years 8 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
ASPLOS
2006
ACM
13 years 11 months ago
Efficient type and memory safety for tiny embedded systems
We report our experience in implementing type and memory safety in an efficient manner for sensor network nodes running TinyOS: tiny embedded systems running legacy, C-like code. ...
John Regehr, Nathan Cooprider, Will Archer, Eric E...
ESTIMEDIA
2009
Springer
13 years 5 months ago
Optimal stack frame placement and transfer for energy reduction targeting embedded processors with scratch-pad memories
Abstract--Memory accesses are a major cause of energy consumption for embedded systems and the stack is a frequent target for data accesses. This paper presents a fully software te...
Lovic Gauthier, Tohru Ishihara
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
14 years 2 months ago
Architectural leakage-aware management of partitioned scratchpad memories
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
Olga Golubeva, Mirko Loghi, Massimo Poncino, Enric...