2530 search results - page 496 / 506 » Dynamic topological logic |
HIPEAC
2009
Springer
14 years 3 days ago
2009
Springer
Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...
ECRTS
2000
IEEE
13 years 12 months ago
2000
IEEE
Internal clock synchronization has been investigated, or employed, for quite a number of years, under the requirement of good upper bounds for the deviation, or accuracy, between ...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
FCCM
1999
IEEE
13 years 11 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
STOC
1999
ACM
13 years 11 months ago
1999
ACM
The width of a Resolution proof is defined to be the maximal number of literals in any clause of the proof. In this paper, we relate proof width to proof length (ϭsize), in both g...