130 search results - page 25 / 26 » Dynamically Scheduling VLIW Instructions |
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
COMPUTER
2002
13 years 7 months ago
2002
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
GLVLSI
2010
IEEE
14 years 16 days ago
2010
IEEE
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
A large number of user requests execute (often concurrently) within a server system. A single request may exhibit fluctuating hardware characteristics (such as instruction comple...
ISCA
2000
IEEE
13 years 11 months ago
2000
IEEE
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...