35 search results - page 5 / 7 » Dynamically reconfigurable cache architecture using adaptive... |
VLSI
2010
Springer
13 years 3 months ago
2010
Springer
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
ISCA
1993
IEEE
14 years 27 days ago
1993
IEEE
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
DAGSTUHL
2006
13 years 10 months ago
2006
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
TC
2008
13 years 8 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
GECCO
2009
Springer
13 years 6 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...