In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mappi...
If motion estimation can choose the most suitable algorithm according to the changing characteristics of input image signals, we can get benefits, which improve quality and perfor...
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chun...
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...