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FPL
2004
Springer
128views Hardware» more  FPL 2004»
14 years 1 months ago
Design and Implementation of a CFAR Processor for Target Detection
Real-time performance of adaptive digital signal processing algorithms is required in many applications but it often means a high computational load for many conventional processor...
Cesar Torres-Huitzil, René Cumplido-Parra, ...
ICCAD
2008
IEEE
150views Hardware» more  ICCAD 2008»
14 years 5 months ago
Performance estimation and slack matching for pipelined asynchronous architectures with choice
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
Gennette Gill, Vishal Gupta, Montek Singh
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
14 years 5 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
ICCD
2008
IEEE
133views Hardware» more  ICCD 2008»
14 years 5 months ago
Reliability-aware Dynamic Voltage Scaling for energy-constrained real-time embedded systems
— The Dynamic Voltage Scaling (DVS) technique is the basis of numerous state-of-the-art energy management schemes proposed for real-time embedded systems. However, recent researc...
Baoxian Zhao, Hakan Aydin, Dakai Zhu
ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane