333 search results - page 21 / 67 » EXACT: algorithm and hardware architecture for an improved A... |
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Inference of phylogenetic trees comprising hundreds or even thousands of organisms based on the maximum likelihood method is computationally extremely expensive. In previous work,...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
ICRA
2010
IEEE
13 years 7 months ago
2010
IEEE
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
FPL
2008
Springer
13 years 10 months ago
2008
Springer
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit the changing needs of a computation during run time. The increa...
CF
2009
ACM
14 years 3 months ago
2009
ACM
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...