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ISCAS
1994
IEEE
117views Hardware» more  ISCAS 1994»
14 years 17 days ago
Design of a Fast Sequential Decoding Algorithm Based on Dynamic Searching Strategy
This paper presents a new sequential decoding algorithm based on dynamic searching strategy to improve decoding efficiency. The searching strategy is to exploit both sorting and p...
Wen-Wei Yang, Li-Fu Jeng, Chen-Yi Lee
CASES
2003
ACM
14 years 1 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
FPL
2007
Springer
99views Hardware» more  FPL 2007»
14 years 10 days ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
CF
2005
ACM
13 years 10 months ago
Dynamic loop pipelining in data-driven architectures
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
João M. P. Cardoso
MONET
2008
150views more  MONET 2008»
13 years 8 months ago
A Multi-radio 802.11 Mesh Network Architecture
Routers equipped with multiple 802.11 radios can alleviate capacity problems in wireless mesh networks. However, a practical, complete system architecture that can realize the bene...
Krishna N. Ramachandran, Irfan Sheriff, Elizabeth ...