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ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
13 years 12 months ago
Understanding the backward slices of performance degrading instructions
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
Craig B. Zilles, Gurindar S. Sohi
AINA
2009
IEEE
14 years 20 days ago
An Analytical Performance Evaluation for WSNs Using Loop-Free Bellman Ford Protocol
—Although several analytical models have been proposed for wireless sensor networks (WSNs) with different capabilities, very few of them consider the effect of general service di...
Mohammad Baharloo, Reza Hajisheykhi, Mohammad Arjo...
PE
2008
Springer
143views Optimization» more  PE 2008»
13 years 7 months ago
Improving the performance of large interconnection networks using congestion-control mechanisms
As the size of parallel computers increases, as well as the number of sources per router node, congestion inside the interconnection network rises significantly. In such systems, ...
José Miguel-Alonso, Cruz Izu, José-&...
ICPADS
2005
IEEE
14 years 1 months ago
Delay-Energy Aware Routing Protocol for Sensor and Actor Networks
We present a novel Delay-Energy Aware Routing Protocol (DEAP) for for heterogeneous sensor and actor networks. DEAP enable a wide range of tradoffs between delay and energy consum...
Arjan Durresi, Vamsi Paruchuri, Leonard Barolli
FLAIRS
2007
13 years 10 months ago
Inference of Edge Replacement Graph Grammars
We describe an algorithm and experiments for inference of edge replacement graph grammars. This method generates candidate recursive graph grammar productions based on isomorphic ...
Jacek P. Kukluk, Lawrence B. Holder, Diane J. Cook