Modern circuits become harder to route with the ever decreasing design features. Previous routability-driven placement techniques are usually tightly coupled with the underlying p...
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
In this paper, we derive the X-half-perimeter wirelength (XHPWL) model for X-architecture placement and explore the effects of three different wire models on X-architecture plac...
In this paper, we present an efficient technique for optimising data replication under the data parallel programming model. We propose a precise mathematical representation for da...
— The present paper describes a decision method for the placement of tactile elements for manipulation task recognition. Based on the mutual information of the manipulation tasks...